The present disclosure relates to semiconductor devices and methods for fabricating the same, and specifically to a semiconductor device including a metal insulator semiconductor field effect transistor (MISFET) having a gate insulating film including a high dielectric constant insulating film (high-k insulating film) containing an adjusting metal and a method for fabricating the same.
In order to achieve increased speed and reduced power consumption which have been required for semiconductor integrated circuits in recent years, both increasing gate capacitance and reducing leakage currents are required. Thus, it has been attempted to use, as gate insulating films, high-k insulating films such as Hf-based oxide films containing hafnium (Hf) instead of conventional silicon oxide films to reduce the electrical thickness of the gate insulating films and to increase the physical thickness of the gate insulating films so that leakage currents are reduced with increased gate capacitance.
However, using the high-k insulating films as the gate insulating films causes a problem where a phenomenon called Fermi level pinning increases threshold voltages of MISFETs (hereinafter referred to as “MIS transistors”). Thus, using Hf-based oxide films containing, for example, lanthanum (La) as the gate insulating films has been considered to reduce threshold voltages of n-type MIS transistors. Note that using the Hf-based oxide films containing La as the gate insulating films can reduce the threshold voltages of the n-type MIS transistors based on the following reasons. When Hf-based oxide films contain La, flat band voltages are shifted in the negative direction, so that effective work functions of n-type MIS transistors are shifted to a band edge, which can reduce threshold voltages of the n-type MIS transistors.
Therefore, a method for fabricating a semiconductor device including an n-type metal oxide semiconductor (MOS) transistor using a Hf-based oxide film containing La as a gate insulating film and a p-type MOS transistor has been proposed (for example, see Patent Document 1: Japanese Patent Publication 2009-194352). A method for fabricating a conventional semiconductor device will be described below with reference to FIGS. 9A-9D. FIGS. 9A-9D are cross-sectional views illustrating process steps of the method for fabricating the conventional semiconductor device in the gate length direction in a sequential order. In FIGS. 9A-9D, the term “nMOS region” refers to a region in which an n-type MOS transistor is formed, and the term “pMOS region” refers to a region in which a p-type MOS transistor is formed.
First, as illustrated in FIG. 9A, SiO2 films 202x, 202y are formed on active regions 200a, 200b surrounded by an element isolation region 201 in a semiconductor substrate 200. After that, a HfSiO film 203 and a Si film 204 are sequentially formed above the semiconductor substrate 200. After that, only portions of the Si film 204 and the HfSiO film 203 located in the pMOS region are nitrided, thereby forming a HfSiON film 205 and a SiN film 206. After that, a La(O) film 207 is formed on the Si film 204 and the SiN film 206.
Next, as illustrated in FIG. 9B, a W film 208 and a TiN film 209 are sequentially formed on the La(O) film 207.
Next, as illustrated in FIG. 9C, a thermal treatment is performed. Through the thermal treatment, La in the La(O) film 207 is diffused into the HfSiO film 203, thereby forming a HfSiO film 210 containing La. On the other hand, the SiN film 206 prevents La in the La(O) film 207 from being diffused into the HfSiON film 205. Additionally, reaction is caused between the Si film 204 and the W film 208, thereby forming a WSi film 211.
Next, as illustrated in FIG. 9D, a polycrystalline Si film is formed on the TiN film 209. After that, patterning is performed. Through the patterning, on the active region 200a, a gate insulating film 210A composed of a SiO2 film 202a and a HfSiO film 210a containing La; and a gate electrode 212A composed of a WSi film 211a, a TiN film 209a, and a polycrystalline Si film 212a are sequentially formed. On the other hand, on the active region 200b, a gate insulating film 205B composed of a SiO2 film 202b and a HfSiON film 205b; a SiN film 206b; a La(O) film 207b; and a gate electrode 212B composed of a W film 208b, a TiN film 209b, and a polycrystalline Si film 212b are sequentially formed.
The conventional semiconductor device is thus fabricated.